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| author | Timothy Pearson <kb9vqf@pearsoncomputing.net> | 2013-03-02 19:58:34 -0600 |
|---|---|---|
| committer | Timothy Pearson <kb9vqf@pearsoncomputing.net> | 2013-03-02 19:58:34 -0600 |
| commit | 40c129a8eb0f0e20ec82316f80de9d3a6852f311 (patch) | |
| tree | 7de5d71f59c59a4fcb770d5501d5dc07ecbd249e /clients/tde/src | |
| parent | 38de64b01788b823a84ba4c28e2af2b5ec2e935c (diff) | |
| download | ulab-40c129a8eb0f0e20ec82316f80de9d3a6852f311.tar.gz ulab-40c129a8eb0f0e20ec82316f80de9d3a6852f311.zip | |
Reset FPGA programmer progress bar on completion
Diffstat (limited to 'clients/tde/src')
| -rw-r--r-- | clients/tde/src/part/fpgaprogram/part.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/clients/tde/src/part/fpgaprogram/part.cpp b/clients/tde/src/part/fpgaprogram/part.cpp index c3b2f4c..11e3542 100644 --- a/clients/tde/src/part/fpgaprogram/part.cpp +++ b/clients/tde/src/part/fpgaprogram/part.cpp @@ -149,6 +149,8 @@ void FPGAProgramPart::processLockouts() { if ((m_connectionActiveAndValid == true) && (m_commHandlerMode == 0)) { m_base->programmingStatusLabel->setText(i18n("Ready")); + m_base->programmingProgressBar->setTotalSteps(1); + m_base->programmingProgressBar->setProgress(-1); } } |