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authorTimothy Pearson <kb9vqf@pearsoncomputing.net>2014-02-27 01:00:35 -0600
committerTimothy Pearson <kb9vqf@pearsoncomputing.net>2014-02-27 01:00:35 -0600
commit6ed57d34cab70cfcada21d3b77014f2e834a0cf9 (patch)
tree5ea8f7750945b29557ff34ae10147bc61f21fbf3 /fpga/interface/beaglebone_black/gpmc
parent1fbfe130665dc4bce56869ed9158531137406129 (diff)
downloadulab-6ed57d34cab70cfcada21d3b77014f2e834a0cf9.tar.gz
ulab-6ed57d34cab70cfcada21d3b77014f2e834a0cf9.zip
First pass of logic analyzer functionality (GPMC interface and server)
Diffstat (limited to 'fpga/interface/beaglebone_black/gpmc')
-rw-r--r--fpga/interface/beaglebone_black/gpmc/test/bbb-gpmc-test.c26
1 files changed, 25 insertions, 1 deletions
diff --git a/fpga/interface/beaglebone_black/gpmc/test/bbb-gpmc-test.c b/fpga/interface/beaglebone_black/gpmc/test/bbb-gpmc-test.c
index ab4eb17..d352348 100644
--- a/fpga/interface/beaglebone_black/gpmc/test/bbb-gpmc-test.c
+++ b/fpga/interface/beaglebone_black/gpmc/test/bbb-gpmc-test.c
@@ -113,6 +113,7 @@ static void gpmc_setup(void)
*(gpmc + displacement + GPMC_CONFIG) = 0x00000000; // Unlimited address space
*(gpmc + displacement + GPMC_CONFIG1) = 0x00000000; // No burst, async, 8-bit, non multiplexed
+// *(gpmc + displacement + GPMC_CONFIG1) = 0x00000010; // No burst, async, 8-bit, non multiplexed, x2 slowed cycle timing
// // 200MHz compatible SRAM device
// *(gpmc + displacement + GPMC_CONFIG2) = 0x00000800; // Assert CS on fclk 0, deassert CS on fclk 8
@@ -139,6 +140,27 @@ static void gpmc_setup(void)
}
}
+void gpmc_dump_registers(void)
+{
+ gpmc_mapregisters();
+
+ if (gpmc != NULL) {
+ int chipselect = 0;
+ int displacement = GPMC_CHIPSELECTCONFIGDISPLACEMENT * chipselect;
+
+ printf("GPMC_CONFIG0: %08x\n", *(gpmc + displacement + GPMC_CONFIG));
+ printf("GPMC_CONFIG1: %08x\n", *(gpmc + displacement + GPMC_CONFIG1));
+ printf("GPMC_CONFIG2: %08x\n", *(gpmc + displacement + GPMC_CONFIG2));
+ printf("GPMC_CONFIG3: %08x\n", *(gpmc + displacement + GPMC_CONFIG3));
+ printf("GPMC_CONFIG4: %08x\n", *(gpmc + displacement + GPMC_CONFIG4));
+ printf("GPMC_CONFIG5: %08x\n", *(gpmc + displacement + GPMC_CONFIG5));
+ printf("GPMC_CONFIG6: %08x\n", *(gpmc + displacement + GPMC_CONFIG6));
+ printf("GPMC_CONFIG7: %08x\n", *(gpmc + displacement + GPMC_CONFIG7));
+ }
+
+ gpmc_unmapregisters();
+}
+
static void io_setup(void)
{
printf("sizeof int:\t%d\n", sizeof(int));
@@ -343,12 +365,14 @@ static void io_setup(void)
// printf("0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\n\r", *(gpio_char + 0), *(gpio_char + 0), *(gpio_char + 0), *(gpio_char + 0), *(gpio_char + 0), *(gpio_char + 0), *(gpio_char + 0), *(gpio_char + 0));
//
+ gpmc_dump_registers();
+
while (1) {
// printf("0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\r", *(gpio_char + 0), *(gpio_char + 1), *(gpio_char + 2), *(gpio_char + 3), *(gpio_char + 4), *(gpio_char + 5), *(gpio_char + 6), *(gpio_char + 7));
// printf("0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\r", *(gpio_char + 0), *(gpio_char + 1), *(gpio_char + 2), *(gpio_char + 3), *(gpio_char + 0x1000), *(gpio_char + 0x1001), *(gpio_char + 0x1002), *(gpio_char + 0x1003));
// printf("0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\r", *(gpio_char + 0), *(gpio_char + 1), *(gpio_char + 2), *(gpio_char + 3), *(gpio_char + 0x4000), *(gpio_char + 0x4001), *(gpio_char + 0x4002), *(gpio_char + 0x4003));
printf("0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\r", *(gpio_char + 0), *(gpio_char + 1), *(gpio_char + 2), *(gpio_char + 3), *(gpio_char + 0x0a), *(gpio_char + 0x0b), *(gpio_char + 0x0c), *(gpio_char + 0x0d));
-// printf("0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\r", *(gpio_char + 0x4000), *(gpio_char + 0x4001), *(gpio_char + 0x4002), *(gpio_char + 0x4003), *(gpio_char + 0x4000), *(gpio_char + 0x4001), *(gpio_char + 0x4002), *(gpio_char + 0x4003));
+// printf("0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\t0x%02x\r", *(gpio_char + 0x4000), *(gpio_char + 0x4001), *(gpio_char + 0x4002), *(gpio_char + 0x4003), *(gpio_char + 0x4004), *(gpio_char + 0x4005), *(gpio_char + 0x4006), *(gpio_char + 0x4007));
usleep(10);
}
}