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-rw-r--r--fpga/xilinx/digilent/spartan_6/s6_remotefpga_test/main.v2
1 files changed, 1 insertions, 1 deletions
diff --git a/fpga/xilinx/digilent/spartan_6/s6_remotefpga_test/main.v b/fpga/xilinx/digilent/spartan_6/s6_remotefpga_test/main.v
index 9f37f9d..b852a6d 100644
--- a/fpga/xilinx/digilent/spartan_6/s6_remotefpga_test/main.v
+++ b/fpga/xilinx/digilent/spartan_6/s6_remotefpga_test/main.v
@@ -296,7 +296,7 @@ module sample_image_processing_demo(clk, wren, dout, addr, din, enable, done);
output reg done;
reg prev_enable;
- reg [(IMAGE_RAM_ADDR_BITS-1):0] counter;
+ reg [IMAGE_RAM_ADDR_BITS:0] counter;
reg toggler;
always @(posedge clk) begin