| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add a several cycle "dead zone" to 7-segment decoder segment select lines to ... | Timothy Pearson | 2019-04-28 | 1 | -16/+55 |
| * | Slow demo file 7-segment clock to a more reasonable KHz value | Timothy Pearson | 2019-04-28 | 1 | -104/+104 |
| * | Fix incorrect pin assignment for 7-segment LED display | Timothy Pearson | 2019-04-28 | 2 | -4/+4 |
| * | Correctly implement 7-segment display LED persistence | Timothy Pearson | 2019-04-28 | 1 | -12/+16 |
| * | Enable remaining I/O busses on Lattice control FPGA | Timothy Pearson | 2019-04-28 | 3 | -13/+59 |
| * | Add test program for Lattice guest FPGAs | Timothy Pearson | 2019-04-28 | 3 | -0/+333 |
| * | Add user logic reset support to serial version of FPGA control interface | Timothy Pearson | 2019-04-28 | 3 | -1/+17 |
| * | Add intial version of Lattice remote FPGA interface | Timothy Pearson | 2019-04-28 | 9 | -1/+350 |
| * | Modify FPGA interface license to AGPL v3 | Timothy Pearson | 2019-04-28 | 1 | -2/+5 |
| * | Add initial GOMC compatible uLab debug system hardware design files | Timothy Pearson | 2014-01-09 | 9 | -0/+1994 |
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index : ulab | |
| Donated space for related uLab project | TDE Gitea Workspace |
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