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fpga
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Author
Age
Files
Lines
*
First pass of logic analyzer functionality (GPMC interface and server)
Timothy Pearson
2014-02-27
1
-1
/
+25
*
First pass of logic analyzer functionality (client and FPGA core)
Timothy Pearson
2014-02-27
14
-224
/
+846
*
Add ability to hard reset user device
Timothy Pearson
2014-01-13
2
-1
/
+10
*
Hard reset user device on connection and disconnection of FPGA viewer
Timothy Pearson
2014-01-13
1
-1
/
+3
*
Add serial I/O to host FPGA
Timothy Pearson
2014-01-12
2
-0
/
+13
*
Add initial version of a logic analyzer server
Timothy Pearson
2014-01-12
1
-3
/
+14
*
Max out logic analyzer memory
Timothy Pearson
2014-01-12
5
-17
/
+102
*
Merge branch 'master' of http://scm.trinitydesktop.org/scm/git/remotelaboratory
Timothy Pearson
2014-01-11
1
-5
/
+122
|
\
|
*
Lower the uLab FPGA viewer GPMC clock to reduce errors on prototype lashup
Timothy Pearson
2014-01-10
1
-5
/
+122
*
|
Add logic analyzer block to control FPGA
Timothy Pearson
2014-01-11
4
-6
/
+149
|
/
*
Relayout the GUI to be more in line with expected norms
Timothy Pearson
2014-01-10
4
-114
/
+132
*
Increase DSP memory size
Timothy Pearson
2014-01-10
2
-1
/
+7
*
Move hardware design files to their correct locations
Timothy Pearson
2014-01-09
7
-510
/
+474
*
Add initial GOMC compatible uLab debug system hardware design files
Timothy Pearson
2014-01-09
14
-0
/
+1007
*
Add initial GPMC test program and associated files for BeagleBone Black
Timothy Pearson
2014-01-09
6
-2
/
+445
*
Add initial version of SVF player for Beaglebone Black
Timothy Pearson
2014-01-01
4
-0
/
+593
*
Fix prior commit
Timothy Pearson
2013-10-30
1
-1
/
+1
*
Fix progress bar not moving during DSP data reception
Timothy Pearson
2013-10-30
1
-4
/
+6
*
Fix prior commit
Timothy Pearson
2013-10-30
1
-3
/
+3
*
Allow data processing RAM size to be configured by changing a Verilog paramet...
Timothy Pearson
2013-10-30
3
-23
/
+52
*
Fix image distortion when certain greyscale values are utilized
Timothy Pearson
2013-10-30
2
-160
/
+157
*
Fix 7 segment display malfunction at low multiplexing rates
Timothy Pearson
2013-10-15
1
-8
/
+8
*
Fix 7-segment LED display and add sample driver for the same
Timothy Pearson
2013-10-14
3
-33
/
+117
*
Use 10-pin headers for ulab debug interface serial port on Spartan 6
Timothy Pearson
2013-04-21
1
-2
/
+2
*
Add sample image processing module to Spartan 6 demo project
Timothy Pearson
2013-04-17
1
-5
/
+72
*
Properly report device programming errors
Timothy Pearson
2013-04-15
1
-0
/
+11
*
Avoid usage of TQTimer::singleShot in the FPGA viewer part
Timothy Pearson
2013-03-13
1
-1
/
+1
*
Add sample design for Spartan 6 and ISE 14.4
Timothy Pearson
2013-03-13
8
-3
/
+615
*
Update remote debug module and clean up FPGA section of the source tree
Timothy Pearson
2013-03-13
4
-2364
/
+1203
*
Add verified Xilinx programming script and device type extractor
Timothy Pearson
2012-11-20
3
-1
/
+107
*
Minor cleanup
Timothy Pearson
2012-11-20
1
-10
/
+11
*
Add magic 64 bytes to S6 svf file
Timothy Pearson
2012-11-20
2
-2
/
+27
*
Add initial untested support for Spartan 6 devices
Timothy Pearson
2012-11-20
2
-1
/
+84
*
Initial rpi jtag support
Timothy Pearson
2012-10-04
1
-106
/
+93
*
Update makefiles
Timothy Pearson
2012-10-02
2
-4
/
+58
*
Add initial files for direct FPGA programming
Timothy Pearson
2012-10-01
96
-0
/
+26114
*
Add public domain FPGA files for Xilinx s3/s3e
Timothy Pearson
2012-05-14
2
-0
/
+2364